വിക്കിപീഡിയ

"ആം ആർക്കിടെക്ചർ" എന്ന താളിന്റെ പതിപ്പുകൾ തമ്മിലുള്ള വ്യത്യാസം

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വ്യത്യാസം കാണൽവിക്കിഎഴുത്ത്
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വരി 4:
[[Image:conexant arm.jpg|right|thumb|A [[Conexant]] എ.ആര്‍.എം. പ്രോസ്സസര്‍ used mainly in [[router]]s]]
എകോം കംപ്യൂട്ടേഴ്സിന്‍റെ കോംപാക്റ്റ് RISC സിപിയു നിര്‍മ്മിക്കാനുള്ള ഡവലപ്പ്മെന്‍റ് പ്രോജക്ടായിട്ടാണ് ARM സിസൈന്‍ തുടങ്ങിയത്.
==എ.ആര്‍.എം. കോറുകള്‍==
{| class="wikitable" width="100%"
! കുടുംബം
! ആര്‍ക്കിടെക്ചര്‍ പതിപ്പ്
! കോര്‍
! Feature
! കാഷെ (I/D)/[[Memory management unit|MMU]]
! Typical [[Million instructions per second|MIPS]] @ MHz
! In application
|-
!ARM1
|ARMv1
|ARM1
|
|None
|
|[[BBC Cheese Wedge#ARM Evaluation System|ARM Evaluation System]] second processor for [[BBC Micro]]
|-
! rowspan=2 | ARM2
|ARMv2
|ARM2
|ആര്‍ക്കിടെക്ചര്‍ 2 added the MUL (multiply) instruction
|None
|4 MIPS @ 8&nbsp;MHz<br>0.33&nbsp;[[DMIPS]]/MHz
|[[Acorn Archimedes]], [[Chessmachine]]
|-
|ARMv2a
|ARM250
|Integrated MEMC (MMU), ഗ്രാഫിക്സ് and IO പ്രോസ്സസര്‍. ആര്‍ക്കിടെക്ചര്‍ 2a added the SWP and SWPB (swap) ഇന്‍സ്ട്രക്ഷന്‍.
|None, MEMC1a
|7 MIPS @ 12&nbsp;MHz
|[[Acorn Archimedes]]
|-
!ARM3
|ARMv2a
|ARM2a
|First use of a processor cache on the ARM.
|[[4K]] unified
|12 MIPS @ 25&nbsp;MHz<br>0.50&nbsp;[[DMIPS]]/MHz
|[[Acorn Archimedes]]
|-
! rowspan=3 | ARM6
| rowspan=3 | ARMv3
|ARM60
|v3 architecture first to support addressing 32 bits of memory (as opposed to 26 bits)
|None
|10 MIPS @ 12&nbsp;MHz
|[[3DO Interactive Multiplayer]], Zarlink GPS Receiver
|-
|ARM600
|Cache and coprocessor bus (for FPA10 floating-point unit).
|4K unified
|28 MIPS @ 33&nbsp;MHz
|
|-
|ARM610
|Cache, no coprocessor bus.
|4K unified
|17 MIPS @ 20&nbsp;MHz<br>0.65&nbsp;[[DMIPS]]/MHz
|[[Risc PC|Acorn Risc PC 600]], [[Apple Newton|Apple Newton 100 series]]
|-
!rowspan=6 | ARM7
|rowspan=6 | ARMv3
|ARM700
|
|8 [[kilobyte|KB]] unified
|40&nbsp;MHz
|[[Risc PC|Acorn Risc PC]] prototype CPU card
|-
|ARM710
|
|8KB unified
|40&nbsp;MHz
|[[Risc PC|Acorn Risc PC 700]]
|-
|ARM710a
|
|8 KB unified
|40&nbsp;MHz<br>0.68&nbsp;[[DMIPS]]/MHz
|[[Risc PC|Acorn Risc PC 700]], [[eMate 300|Apple eMate 300]]
|-
|ARM7100
|Integrated SoC.
|8 KB unified
|18&nbsp;MHz
|[[Psion 5|Psion Series 5]]
|-
|ARM7500
|Integrated SoC.
|4 KB unified
|40&nbsp;MHz
|[[Acorn A7000]]
|-
|ARM7500FE
|Integrated SoC. "FE" Added FPA and EDO memory controller.
|4 KB unified
|56&nbsp;MHz<br>0.73&nbsp;[[DMIPS]]/MHz
|[[RiscStation|Acorn A7000+]]
|-
! rowspan=5 | [[ARM7TDMI]]
| rowspan=4 | ARMv4T
|ARM7TDMI(-S)
|3-stage pipeline, Thumb
|none
|15 MIPS @ 16.8&nbsp;MHz
|[[Game Boy Advance]], [[Nintendo DS]], [[iPod]], [[Lego NXT]], [[Atmel]] [[AT91SAM]]7, [[Juice Box]]
|-
|ARM710T
|
|8 KB unified, MMU
|36 MIPS @ 40&nbsp;MHz
|[[Psion 5|Psion Series 5mx]], [[Psion Revo]]/Revo Plus/Diamond Mako
|-
|ARM720T
|
|8 KB unified, MMU
|60 MIPS @ 59.8&nbsp;MHz
|[[Zipit Wireless Messenger]]
|-
|ARM740T
|
|MPU
|
|
|-
|ARMv5TEJ
|ARM7EJ-S
|Jazelle DBX, Enhanced DSP instructions, 5-stage pipeline
|none
|
|
|-
! rowspan=2 | [[StrongARM]]
| rowspan=2 | ARMv4
|SA-110
|
|16 KB/16 KB, MMU
|203&nbsp;MHz<br>1.0&nbsp;[[DMIPS]]/MHz
|[[Apple Newton]] 2x00 series, [[Risc PC|Acorn Risc PC]], Rebel/Corel Netwinder, Chalice CATS, Psion Netbook
|-
|SA-1110
|
|16 KB/16 KB, MMU
|233&nbsp;MHz
|[[LART]], Intel Assabet, [[Ipaq]] H36x0, [[Balloon Board|Balloon2]], [[Zaurus]] SL-5x00, [[HP Jornada]] 7xx, [[Jornada 560 series]], Palm Zire 31
|-
! ARM8
| ARMv4
| ARM810<ref>[http://www.hotchips.org/archives/hc8/2_Mon/HC8.S4/HC8.4.1.pdf "ARM810 - Dancing to the Beat of a Different Drum"] ARM Limited presentation at [[Hot Chips]] 8, 1996</ref>
|5-stage pipeline, static branch prediction, double-bandwidth memory
| 8 KB unified, MMU
| 84 MIPS @ 72 MHz<br>1.16&nbsp;[[DMIPS]]/MHz
| [[Risc PC|Acorn Risc PC]] prototype CPU card
|-
! rowspan=4 | ARM9TDMI
| rowspan=4 | ARMv4T
|ARM9TDMI
|5-stage pipeline
|none
|
|
|-
|ARM920T
|
|16 KB/16 KB, MMU
|200 MIPS @ 180&nbsp;MHz
|[[Armadillo CPU Boards|Armadillo]], [[GP32]],[[GP2X]] (first core), [[Tapwave Zodiac]] ([[Motorola]] i. MX1), Hewlet Packard [[HP-49 series|HP-49/50 Calculators]], [[Sun SPOT]], [Cirrus Logic EP9315], [[Samsung]] s3c2442 ([[HTC TyTN]], [[First International Computer|FIC]] [[Neo FreeRunner]]<ref>{{cite web |url=http://wiki.openmoko.org/wiki/Neo1973:_GTA01Bv4_versus_GTA02_comparison |title=Neo1973: GTA01Bv4 versus GTA02 comparison |accessdate=2007-11-15}}</ref>)
|-
|ARM922T
|
|8 KB/8 KB, MMU
|
|
|-
|ARM940T
|
|4 KB/4 KB, MPU
|
|[[GP2X]] (second core), Meizu [[M6 Mini Player]]<ref>{{cite web |url=http://www.rockbox.org/twiki/bin/view/Main/SamsungSA58|title=Rockbox Samsung SA58xxx series |accessdate=2008-02-22}}</ref> <ref>{{cite web |url=http://www.rockbox.org/twiki/bin/view/Main/MeizuM6Port |title=Rockbox Meizu M6 Port - Hardware Information |accessdate=2008-02-22}}</ref>
|-
! rowspan=5 | [[ARM9E]]
| rowspan=3 | ARMv5TE
|ARM946E-S
|Enhanced DSP instructions
|variable, tightly coupled memories, MPU
|
|[[Nintendo DS]], [[Nokia]] [[N-Gage]], Conexant 802.11 chips
|-
|ARM966E-S
|
|no cache, TCMs
|
|
[[ST Microelectronics|ST Micro]] STR91xF, includes Ethernet [http://mcu.st.com/mcu/modules.php?name=mcu&file=devicedocs&DEV=STR912FW44&FAM=101]
|-
|ARM968E-S
|
|no cache, TCMs
|
|
|-
|ARMv5TEJ
|ARM926EJ-S
|Jazelle DBX, Enhanced DSP instructions
|variable, TCMs, MMU
|220 MIPS @ 200&nbsp;MHz,
|Mobile phones: [[Sony Ericsson]] (K, W series); [[Siemens AG|Siemens]] and [[Benq]] (x65 series and newer); Texas Instruments [[OMAP|OMAP1710]], [[OMAP|OMAP1610]], [[OMAP|OMAP1611]], [[OMAP|OMAP1612]], [[OMAP|OMAP-L137]]; [[Qualcomm]] MSM6100, MSM6125, MSM6225, MSM6245, MSM6250, MSM6255A, MSM6260, MSM6275, MSM6280, MSM6300, MSM6500, MSM6800; [[Freescale]] [[i.MX21]], i.MX27, [[Atmel]] [[AT91SAM]]9, GPH Wiz, [[Marvell Technology Group|Marvell]] [[Feroceon]]
|-
|ARMv5TE
|ARM996HS
|Clockless processor, Enhanced DSP instructions
|no caches, TCMs, MPU
|
|
|-
! rowspan=3 | ARM10E
| rowspan=2 | ARMv5TE
|ARM1020E
|(VFP), 6-stage pipeline, Enhanced DSP instructions
|32 KB/32 KB, MMU
|
|
|-
|ARM1022E
|(VFP)
|16 KB/16 KB, MMU
|
|
|-
|ARMv5TEJ
|ARM1026EJ-S
|Jazelle DBX, Enhanced DSP instructions
|variable, MMU or MPU
|
|
|-
! rowspan=18 | [[XScale]]
| rowspan=18 | ARMv5TE
|80200/IOP310/IOP315
|I/O Processor, Enhanced DSP instructions
|
|
|
|-
|80219
|
|
|400/600&nbsp;MHz
|[[Thecus]] N2100
|-
|IOP321
|
|
|600 [[BogoMips]] @ 600&nbsp;MHz
|[[Iyonix]]
|-
|IOP33x
|
|
|
|
|-
|IOP34x
|1-2 core, RAID Acceleration
|32K/32K L1, 512K L2, MMU
|
|
|-
|PXA210/PXA250
|Applications processor, 7-stage pipeline
|
|PXA210: 133 and 200&nbsp;MHz, PXA250: 200, 300, and 400&nbsp;MHz
|[[Zaurus]] SL-5600, [[iPAQ]] H3900, [[Sony]] [[CLIÉ]] NX60, NX70V, NZ90
|-
|PXA255
|
|32KB/32KB, MMU
|400 [[BogoMips]] @ 400&nbsp;MHz
|[[Gumstix|Gumstix basix & connex]], [[Palm Tungsten]] E2,[[Mentor Ranger & Stryder]], iRex [[ILiad]]
|-
|PXA263
|
|
|200,&nbsp;300&nbsp;and&nbsp;400&nbsp;MHz
|[[Sony]] [[CLIÉ]] NX73V, NX80V
|-
|PXA26x
|
|
|default 400&nbsp;MHz, up to 624&nbsp;MHz
|[[Palm_Tungsten#Tungsten_T3|Palm Tungsten T3]]
|-
|PXA27x
|Applications processor
|32 [[kilobit or kilobyte?|Kb]]/32 Kb, MMU
|800 MIPS @ 624&nbsp;MHz
|[[Gumstix|Gumstix verdex]], [[High Tech Computer Corporation|HTC]] Universal, [[Hewlett-Packard|HP]] hx4700, [[Zaurus]] SL-C1000, 3000, 3100, 3200, [[Dell Axim]] x30, x50, and x51 series, Motorola Q, [[Balloon Board|
Balloon3]], [[Greenphone|Trolltech Greenphone]], [[Palm TX]], Motorola Ezx Platform A728, A780, A910, A1200, E680, E680i, E680g, E690, E895, Rokr E2, Rokr E6, Fujitsu Siemens LOOX N560, Toshiba Portégé G500, Trēo 650-755p, [[Zipit Wireless Messenger|Zipit Z2]]
|-
|PXA800(E)F
|
|
|
|
|-
|Monahans
|
|32KB/32KB L1, TCM, MMU
|1000 MIPS @ 1.25&nbsp;GHz
|
|-
|PXA900
|
|
|
|Blackberry 8700, Blackberry Pearl (8100)
|-
|IXC1100
|Control Plane Processor
|
|
|
|-
|IXP2400/IXP2800
|
|
|
|
|-
|IXP2850
|
|
|
|
|-
|IXP2325/IXP2350
|
|
|
|
|-
|IXP42x
|
|
|
|[[NSLU2]]
|-
|IXP460/IXP465
|
|
|
|
|-
!rowspan=4 | ARM11
|ARMv6
|ARM1136J(F)-S
|[[SIMD]], Jazelle DBX, (VFP), 8-stage pipeline
|variable, MMU
|740 @ 532-665&nbsp;MHz (i.MX31 SoC), 400-528&nbsp;MHz
|Texas Instruments [[OMAP|OMAP2420]] ([[Nokia E90]], [[Nokia N93]], [[Nokia N95]], [[Nokia N82]]), [[Zune]], [[BUGbase]], [[Nokia N800]], [[Nokia N810]], [[Qualcomm]] MSM7200 (with integrated ARM926EJ-S Coprocessor@274MHz, used in [[Eten Glofiish]], [[HTC TyTN II]], [[HTC Nike]]), Freescale [[i.MX31]] (which was used in the original Zune 30gb and Toshiba Gigabeat S).
|-
|ARMv6T2
|ARM1156T2(F)-S
|[[SIMD]], Thumb-2, (VFP), 9-stage pipeline
|variable, MPU
|
|
|-
|ARMv6KZ
|ARM1176JZ(F)-S
|[[SIMD]], Jazelle DBX, (VFP)
|variable, MMU+TrustZone
|
|[[iPhone|Apple iPhone]], [[iPod touch|Apple iPod touch]], [[Conexant|Conexant CX2427X]], [[Motorola RIZR Z8]], [[Motorola Motorizr Z10|Motorola RIZR Z10]]
|-
|ARMv6K
|ARM11 MPCore
|1-4 core SMP, [[SIMD]], Jazelle DBX, (VFP)
|variable, MMU
|
|[[Nvidia APX 2500]]
|-
! rowspan=6 | Cortex
|rowspan=3 |ARMv7-A
|Cortex-A8
|Application profile, VFP, NEON, Jazelle RCT, Thumb-2, 13-stage superscalar pipeline
|variable (L1+L2), MMU+TrustZone
|up to 2000 (2.0 DMIPS/MHz in speed from 600&nbsp;MHz to greater than 1&nbsp;GHz)
|Texas Instruments [[OMAP|OMAP3430][SBM|SBM7000],|[[Gumstix|Gumstix Overo Earth]], [[Pandora (console)|Pandora]], [[Archos 5]]
|-
|Cortex-A9
|Application profile, (VFP), (NEON), Jazelle RCT and DBX, Thumb-2, Out-of-order speculative issue superscalar
|MMU+TrustZone
|2.0 DMIPS/MHz
|
|-
|Cortex-A9 MPCore
|As Cortex-A9, 1-4 core SMP
|MMU+TrustZone
|2.0 DMIPS/MHz
|
|-
|ARMv7-R
|Cortex-R4(F)
|Embedded profile, (FPU)
|variable cache, MPU optional
|600 [[DMIPS]]
|[[Broadcom]] is a user, TMS570 from Texas Instruments
|-
|ARMv7-M
|Cortex-M3
|Microcontroller profile, Thumb-2 only.
|no cache, (MPU)
|125 DMIPS @ 100&nbsp;MHz
|[[Energy Micro]]'s [[EFM32]], [http://www.luminarymicro.com Luminary Micro] microcontroller family, [[ST Microelectronics]] [http://mcu.st.com STM32]
|-
|ARMv6-M
|Cortex-M1
|FPGA targeted, Microcontroller profile, Thumb-2 (BL, MRS, MSR, ISB, DSB, and DMB).
|None, tightly coupled memory optional.
|Up to 136 DMIPS @ 170&nbsp;MHz<ref>[http://www.arm.com/news/17017.html "ARM Extends Cortex Family with First Processor Optimized for FPGA"], ARM press release, March 19 2007. Accessed April 11, 2007.</ref> (0.8 DMIPS/MHz<ref>[http://www.arm.com/products/CPUs/ARM_Cortex-M1.html "ARM Cortex-M1"], ARM product website. Accessed April 11, 2007.</ref>, MHz achievable FPGA-dependent)
|"Actel ProASIC3 and Actel Fusion PSC devices will sample in Q3 2007"<ref>[http://www.arm.com/news/17017.html ARM Extends Cortex Family with First Processor Optimized for FPGA<!-- Bot generated title -->]</ref>
|}
==അവലംബം==
<references/>
"https://ml.wikipedia.org/wiki/ആം_ആർക്കിടെക്ചർ" എന്ന താളിൽനിന്ന് ശേഖരിച്ചത്